The present disclosure relates to circuits and methods for repairing a column in a semiconductor memory device, and more particularly, to a circuit and method for repairing a column in a semiconductor memory device which is improved to change an externally inputted block address in a row active state according to a block address for column repair in a structure for sharing row repair lines of an adjacent block memory array.
Generally, under the condition that even one cell among a plurality of fine cells comprising a dynamic random access memory (DRAM) is defective, the DRAM cannot perform a normal function. A redundancy method has been widely employed to increase a production yield by replacing the defective cell with a spare memory cell previously mounted into the DRAM. Such a redundancy method is used for replacing a defective cell with a redundancy cell prepared in rows and columns in advance when a memory cell is checked as defective, thereby wasting no chip.
A conventional repair method is explained with reference to FIGS. 1-3. In particular, a typical 8-block memory array structure comprising one bank 2 in a DRAM, an X-decoder 4, and a Y-decoder 6 is illustrated in FIG. 1. Here, the X-decoder 4 and the Y-decoder 6 are configured to provide a signal such as row address and column address for controlling the active state of cells contained in each block.
As shown in FIG. 1, I, J and K are block selecting address, and each block is prepared with a certain number of redundant row/column repair lines for salvaging the defective cell. However, there is a limitation on the amount of cells in one block that may be salvaged by repair. Thus, it is necessary to use repair lines of an adjacent block to increase the repair efficiency.
Further, the adjacent block indicates one of a pair of blocks whose block address bit I and K are identical and which is selected by block address bit J. In this case, an adjacent block selecting signal SELF_PAIRb less than 0:7 greater than  determines which repair line to use among repair lines of the pair of blocks. This adjacent block selecting signal SELF_PAIRb less than 0:7 greater than , as an output signal from a row fuse box (not shown), is determined based on cut state of a fuse within the row fuse box.
In other words, if the adjacent block selecting signal SELF_PAIRb less than i greater than  (i=0-7) is at a high level, the repair lines corresponding to an externally inputted block address are used for repair, or if the adjacent block selecting signal SELF_PAIRb less than i greater than  is at a low level, the repair lines of an adjacent block of a block corresponding to an externally inputted block address is used for the repair.
For example, in a case where all row repair lines of block 0 have been put into use, if an additional row repair for block 0 is needed, the adjacent block selecting signal SELF_PAIRb is provided at a low level in order to use row repair lines of block 2. Thus, even though the block address (e.g., [000]) corresponding to block 0 is inputted, the row repair lines of block 2 are selected by the adjacent block selecting signal SELF_PAIRb less than 0 greater than .
Because a column repair method also has block address information, the defective column is replaced by a column repair line if any one of columns in a selected block is defective. However, in the conventional repair method for sharing row repair lines of an adjacent block, there is a problem if a column repair state is not considered when a row repair is performed by using the row repair lines of the adjacent block.
In the conventional repair method for sharing rowrepair lines of an adjacent block, a column repair circuit without considering a column repair state is further explained with reference to FIGS. 2 and 3. FIG. 2 is a circuit diagram illustrating a conventional column repair circuit without considering a column repair state in the conventional repair method for sharing row repair lines of an adjacent block. The column repair circuit includes a column redundancy fuse unit 20, a column redundancy decoding unit 30 and a column redundancy determining unit 40.
Here, the column redundancy fuse unit 20 receives a column redundancy start signal YREDST and block address RAT less than 9:11 greater than  and inverted block address RAB less than 9:11 greater than , and generates column address control signals YES less than 1:7 greater than  and an initializing signal YFJB of the column address control signal. Each bit of block address RAT  less than 9:11 greater than  is corresponding to block address K, J, I in FIG. 1. RAB less than 9:11 greater than  is generated by inverting signal level of each bit of RAT less than 9:11 greater than .
The column redundancy decoding unit 30 decodes column address BYAC less than 1:7 greater than  in response to the column address control signals YFS less than 1:7 greater than  and the initializing signal YFJB of the column address control signal, and generates decoded column address YAJ less than 1:7 greater than . The column redundancy determining unit 40 generates a column redundancy signal YREDC for column repair based on the decoded column address YAJ less than 1:7 greater than .
In the column repair circuit, a column repair state is not reflected during a row repair because externally inputted block address RAT less than 9:11 greater than  and RAB less than 9:11 greater than  are inputted into the column repair circuit as they are (i.e., not inverted). As a result, a defect in a column cannot be detected.
Referring to FIG. 3, for example, assuming that a defective column of block 2 is repaired and the row repair of block 0 is performed by using an adjacent block 2 which is an adjacent block, it is necessary to reflect a column defect state for row repair lines of block 2 selected for the row repair of block 0 during the repair. In other words, a defective column of the row repair lines of block 2 needs to be replaced by a column repair line to repair a column defect for the row repair lines of block 2.
When the adjacent block selecting signal SELF_PAIRb less than 0 greater than  is a high level, row repair lines of the block designated by the inputted block address [000] (i.e., row repair lines of block 0) is used, thereby causing no problem. However, when the adjacent block selecting signal SELF_PAIRb less than 0 greater than  is a low level, the row repair lines of the adjacent block(block 2) is used. But, because the inputted block address is a block address [000] corresponding to block 0, not a block address [010] corresponding to block 2, a defect state of block 2 is not detected. Hence, a column defect state is not reflected during the row repair by using the row repair lines of the adjacent block.
One aspect of the present disclosure is to improve the repair efficiency of a semiconductor memory device by repairing a defective column according to a column defect state when a defect is present in a column of the row repair lines of the adjacent block selected for row repair, in a semiconductor memory device or sharing row repair lines of an adjacent block.
According to one aspect of the present disclosure, there is provided a circuit for repairing a column in a semiconductor memory device comprising an adjacent block selecting fuse circuit for generating an adjacent block selecting signal in response to a column redundancy start signal, the adjacent block selecting signal determining whether to use row repair lines of a block designated by an externally inputted block address or row repair lines of an adjacent block of the block. A column redundancy fuse circuit receives the adjacent block selecting signal, the block address, an inverted block address, and the column redundancy start signal, and generates a plurality of column address control signals and initializing signal of the column address control signal. A column redundancy decoding circuit decodes column address in response to the initializing signal and the plurality of column address control signals, and generates decoded column address. A column redundancy determining circuit generates a column redundancy signal based on the decoded column address. The column redundancy fuse unit includes an address transmission unit to transmit an adjacent block designating bit designating the adjacent block among the block address and an inverted adjacent block designating bit designating the adjacent block among the inverted block address in response to the adjacent block selecting signal.
According to another aspect of the present disclosure, there is provided a method for repairing a column in a semiconductor memory device, which comprises the steps of: generating an adjacent block selecting signal in response to a column redundancy start signal, the adjacent block selecting signal determining whether to use row repair lines of a block designated by an externally inputted block address or row repair lines of an adjacent block of the block; transmitting an adjacent block designating bit for designating the adjacent block among the block address and an inverted adjacent block designating bit for designating the adjacent block among an inverted block address in response to the adjacent block selecting signal; generating a plurality of column address control signals and an initializing signal of the column address control signal in response to the column redundancy start signal, the adjacent block designating bit, the inverted adjacent block designating bit, and a plurality of bit in which the adjacent block designating bit and the inverted adjacent block designating bit are removed form the block address and the inverted block address; generating decoded column address by decoding the initializing signal, the column address control signal and one bit of column address; and repairing a defective column by generating a column redundancy signal in response to decoded column address.